1. Field of the Invention
The present invention relates to digital logic simulators. In particular, the present invention relates to digital logic simulators running on a general purpose computer. More particularly, the invention relates to a compiler which translates a gate-level description of a digital logic circuit into an optimized sequence of machine instructions. When this sequence of machine instructions is executed on a computer, the behavior of the digital logic circuit is simulated.
2. Background of the Invention
Digital logic simulators are used in the design and debugging of digital circuits. A digital logic simulator allows the behavior of a circuit design to be checked against the circuit specification. Many digital logic simulators are implemented as programs running on a general purpose computer. Simulating a logic circuit typically involves inputting the circuit design and a set of circuit stimulus to the digital logic simulator. The digital logic simulator then computes the circuit's outputs in response to that stimulus. These outputs are compared with the circuit's specification to determine the correctness of the design.
To debug and verify the correctness of a very large digital circuit, such as a microprocessor, a large amount of circuit stimulus must be simulated. Typically, this stimulus is broken into a number of smaller sets. These smaller sets may only check certain portions of the design which helps the designer locate and correct errors more rapidly. Nevertheless, because of the sheer size of the circuit, and the length of the stimulus files, a significant amount of the design process may be spent waiting for the results of simulations. Therefore, reducing the amount of time a simulation takes to run will decrease design time. Furthermore, increasing the speed of digital logic simulation improves the quality of the design by allowing more circuit stimulus to be applied to the design in the same amount of time. The more circuit stimulus that is applied, the more likely an error is to be detected.
Accordingly, there is a need in the art for faster digital logic simulators. It is also desired that such simulator run on a general purpose computer. Furthermore, such simulator should be portable from one computer architecture to another.